Timer & Counter

Timer with Ladder diagram

A timer is used with a PLC to determine the time interval through logical operations. For instance, in a PLC-controlled traffic signal system, a timer restricts the signaling system for a specified time interval. There are different types of timers, such as on-delay, off-delay, and pulse timers, that are functional within a PLC. Physically, timers do not have a separate existence in a PLC but rather have an inbuilt memory area reserved for them in the CPU. In a ladder diagram, a timer is represented by a box with parameters and titles like T5, T10, and T15. However, different PLC manufacturers use various symbols and appearances to represent timers in a ladder diagram.

The following discussion describes timers in line with Siemens PLCs, specifically S7 300 and S7 400. The symbols and presentation types mentioned here are applicable only to Siemens PLCs. However, regardless of the representation or programming style used with the PLC, the basic working principle remains the same for all types of timers in all other PLCs. 

A timer has an enable signal denoted by the symbol S. The S symbol represents the set instruction, and the reset or stopping of a timer is indicated by the letter R. This means a timer starts when the S point receives a logic 1 signal and stops when the R point receives a logic 1 signal (as shown in the previous picture). The output of a timer is represented by the letter Q and can be used to activate a coil or output through various circuits using normally open (NO) and normally closed (NC) logic. The time value of a timer is typically expressed with the symbol TV, and a typical format like 'S5T#aH_bM_cS_dMS' is used to specify the time value of a timer (applicable to Siemens PLCs only). Here, H stands for an hour, M for a minute, S for a second, and MS for a millisecond. The letters a, b, c, and d are used to define the numeric value for the time interval (as shown in the previous picture, representing a time value of 15 seconds). The text 'S5T#' represents the S5 Timer. For example, to write the time value of 5 minutes and 3 seconds, it would be written as 'S5T#5M_3S' at the TV point. Other PLCs may use different representations for time values with their respective timer symbols. The following timers are typically used with most PLCs:

• On-Delay Timer 
• Retentive On-Delay Timer
• Off-Delay Timer
• Pulse Timer
• Extended Pulse Timer

 

On-Delay Timer (S_ODT)

An on-delay timer is used when an output needs to turn on after a certain delay. The timer is enabled by an input signal at the S point and runs for the specified time interval set at the TV input. As long as the signal at the S point is logic 1, the output at the Q point will become logic 1 after the timer elapses the time interval. If the signal at the S point changes from logic 1 to logic 0 while the timer is running, the timer immediately stops, and the output status at Q becomes logic 0. The timer can be reset at any time if the reset point R is triggered or its status becomes logic 1. In a ladder diagram, the on-delay timer is represented as 'S_ODT' (for Siemens PLCs only). The following picture shows an on-delay timer symbol and its timing diagram. 

  

The number 'T5' represents an on-delay timer (indicated by the S_ODT symbol). Input I2.3 is used as the set or enable signal for the timer, and it will start when the input signal I2.3 becomes logic 1. The time value for the timer is set to 15 seconds (written as S5T # 15S at the TV point), and it activates the PLC output Q1.5. Input signal I2.4 is used to reset the timer. With this circuit, the T5 timer will immediately activate when the signal is received at input I2.3, but the status of Q will only become high after 15 seconds. It will also activate the Q1.5 output coil of the PLC or set its status to logic 1. The Q1.5 coil output will remain active as long as input I2.3 is ON or logic 1. To deactivate the timer output, either input I2.3 needs to become logic 0, or the reset input I2.4 needs to be set to logic 1. This timer can be used for functions such as delayed motor starting or delayed activation of an actuator linked to output Q1.5.

Retentive On-Delay Timer (S_ODTS)

The working principle of a retentive on-delay timer is very similar to an on-delay timer, with the only difference being that it does not turn off if the enable input goes off or its status becomes logic 0. This means a retentive on-delay timer starts with a positive edge signal at the setpoint and remains on regardless of the input signal status. The timer enables the output Q after the specified time interval elapses, and it remains on until the reset signal is sent. In a ladder diagram, the retentive on-delay timer is represented as 'S_ODTS' (for Siemens PLCs only). The following picture shows a retentive on-delay timer symbol and its timing diagram.

 

The enable sequence for a retentive on-delay timer is similar to an on-delay timer. The timer output Q will activate only after 15 seconds when it receives the enable signal I2.3 (using the discussed timing value), and the enable signal can be triggered by a positive pulse. This means if the input status of I2.3 becomes logic 0 within 15 seconds (in this case), the timer will remain enabled and the output Q will activate, or its status will become logic 1 after the time elapses. The timer can be reset by triggering input I2.4, and as a result, the output will also deactivate or its status will become logic 0. In this case, the timer output Q is used to enable the coil Q1.5.

 

Off-Delay Timer (S_OFFDT)

With an off-delay timer, the output point Q always remains logic 1 as long as the input status at the set point (S) remains logic 1. The off-delay timer starts with a negative edge signal at the set point S and is reset when a logic 1 signal is received while the timer is running. When the negative edge signal is received at the S input, the timer disables its output, and the status of the Q point becomes logic 0 after the specified time interval. In a ladder diagram, the off-delay timer is represented as 'S_OFFDT' (for Siemens PLCs only). The following pictures show an off-delay timer symbol and its timing diagram.

According to the timing diagram, the output Q will become logic 1 immediately after receiving the enable signal at the input I2.3 and will become logic 0 after the time interval is completed (which is 15 seconds in this case). The timing diagram also shows that the timing value will not be considered as long as the input status at the set point is logic 1, and the timer will start immediately upon receiving the negative pulse at the set point input I2.3. The timer can be reset and the output status set to logic 0 by setting the input status of I2.4 to logic 1. The timer output Q is used to enable the coil Q1.5, which can be further utilized in various logical operations.

 

     

Pulse Timer (S_PULSE)

A pulse timer is used in ladder diagrams to generate an output of fixed duration. The timer output immediately turns ON when the enabling signal is present at the set point of the pulse timer and turns OFF after a specified time. In a ladder diagram, a pulse timer is represented by the symbol 'S_PULSE' (for Siemens PLCs). The following images depict a pulse timer symbol and its timing diagram. 

In this diagram, input I2.3 is used to enable the pulse timer at set point S. When the input status becomes logic 1, the output Q immediately turns ON, and it turns OFF after the specified time (in this case, 15 seconds), while the input status at set point S remains logic 1. When the input status of I2.3 becomes logic 0, the output Q also turns OFF or becomes logic 0. The output Q can be reset at any point by enabling the reset input I2.4. The timer output Q is connected to energize coil Q1.5, which can be used in various logical operations.

 

Extended Pulse Timer (S_PEXT)

The extended pulse timer has a functionality similar to the pulse timer, with the difference that if the timer's enabling signal goes OFF, the output will not immediately stop but will remain active for the specified time. In a ladder diagram, the extended pulse timer is represented by the symbol 'S_PEXT' (for Siemens PLCs). The following images show the symbol and timing diagram of an extended pulse timer.

In this diagram, input I2.3 is used to enable the extended pulse timer at set point S. When the input status becomes logic 1, the output Q immediately turns ON, and it turns OFF after the specified time (in this case, 15 seconds). When the input status of I2.3 becomes logic 0, the output Q will not turn OFF immediately and will remain logic 1 until the specified time interval is completed. The output Q can be reset at any point by enabling the reset input I2.4. The timer output Q is connected to energize coil Q1.5, which can be used in various logical operations.

Counter with Ladder Diagram 

A counter is used in a PLC system to count or calculate objects. It increments or decrements the count value based on the input signals received. When the input signals to the counter are logic 1, the count value is incremented or decremented as an integer value. An "Up counter" increases the count, while a "Down counter" decreases the count. For example, in a bottling plant, a sensor signals the bottles passing over a conveyor, and the PLC counter estimates the number of bottles by counting the signal frequency.

Counters are typically used in two ways. In the first case, when a specified number is reached, the output signal of the counter becomes logic 1. For instance, after counting every ten bottles in the previous example, an output signal can be generated to indicate the start of packaging. In the second case, the output signal remains ON until a certain number of signals are received by the counter. Once the specified number is reached, the counter turns its output signal OFF.

Counters, like timers, are built into PLC systems and used in programs as needed. In a ladder diagram, a counter is represented by a box with associated components and is addressed as C1, C5, C10, etc. Different PLC manufacturers may use different symbols to represent counters, but the basic working principle remains the same. In this document, the symbols used align with SIEMENS S7300 and S7400 PLCs. There are two common types of counters: "Count-Up" and "Count-Down" Sometimes, both types are integrated into a single assembly and function as a "Count Up/Down" Counter. The following three types of counters are discussed below. 

Count-Up Counter

In a ladder diagram, a count-up counter is represented as 'S_CU' (for Siemens PLCs). The following image shows the symbol and timing diagram of a count-up counter.

 

In this diagram, the count-up counter is labeled as C5. Input I2.3 is connected to the CU point, which counts the up-count signals. Each pulse (transition from logic 0 to logic 1) received at input I2.3 adds one to the count continuously (as shown in the timing diagram). Input I2.4 is connected to the set point S, which activates the counter and sets it with its preset value. In this example, the preset value is set to 6 (MW6). When the count reaches 6, the output Q becomes high (logic 1). The output of the counter is used to activate the PLC coil Q1.5. Input I2.5 is used for resetting the counter at any point. When the input status of I2.5 is logic 1, all the counting values are reset to zero, and the output of the counter turns OFF (logic 0). The counter symbol is accompanied by a count-up timing diagram with a preset value of six for better understanding.

 

Count-Down Counter

The operating principle of a count-down counter is similar to that of a count-up counter. In a ladder diagram, it is represented as 'S_CD' (for Siemens PLCs). The following image shows the symbol and timing diagram of a count-down counter.

 

In this diagram, input I2.3 is connected to the count-down (CD) point, and each pulse received at this point (logic 0 to logic 1 transition) is considered a count-down signal. Inputs I2.4 and I2.5 are used as set and reset inputs, respectively. The coil output Q1.5 is connected to the output signal of the counter, and the preset value (PV) is set to 6. Each incoming pulse at the input point I2.3 subtracts from the preset value until it reaches zero. When the preset value becomes zero, the counter output Q is activated, and the PLC output coil Q1.5 turns ON (logic 1). The reset input I2.5 can turn the output coil Q1.5 OFF (logic 0). The count-down timing diagram with a preset value of six represents the counter symbol.

  

Count Up / Down Counter

Sometimes, both count-up and count-down counters are integrated into a single assembly and function as an up/down counter. In a ladder diagram, it is represented as 'S_CUD' (for Siemens PLCs). The following image shows the symbol and timing diagram of an up/down counter. 

In this up/down counter, input I2.2 is connected as the count-up (CU) signal, and input I2.3 is considered the count-down (CD) signal. The pulses received at the CU point are added, while the pulses received at the CD point are subtracted. The output Q activates based on the preset value (four in this case) and accumulates the count-up and count-down signals. It also activates the output coil Q1.5 of the PLC. Inputs I2.4 and I2.5 are used for set and reset functions, respectively. The count up/down timing diagram with a preset value of four represents the counter symbol.